Vision systems, high-resolution video systems, and broadcasting equipment all have a common characteristic: they need to transmit image and video data at high rates over serial connections. Serial data transmission in these systems enables higher resolution, higher frame rate video transmission in many products, where transmission occurs over differential SerDes channels. A 2-wire system in vision applications only provides unidirectional serial data transmission, often over short distances and without important control or configuration links embedded in the channel.
The V3Link™ products from Texas Instruments overcome these limitations by giving designers a simple solution for implementing long-reach SerDes channels in video systems. TI V3Link™ channels operate over a single wire with Gbps data rates and enough bandwidth to transmit 4k vision data with low latency. Other applications that are supported by the V3Link™ include data capture from satellite RADAR, LIDAR, and time-of-flight (ToF) sensors. Let’s take a closer look at this product family and how it can be used in your next imaging system design.
About TI V3Link™ Products
The V3Link™ platform from Texas Instruments is designed for long-reach 4k vision systems, or more generally, for spatially multiplexed sensor platforms that provide data in parallel. The platform consists of three part numbers:
- TSER953 serializer supporting a single high-definition vision sensor
- TDES954 deserializer supporting up to two connections with TSER953
- TDES960 deserializer supporting up to four connections with TSER953
Although designed to form high-speed SerDes channels for vision systems, the TSER953 transceiver supports power-over-coax (PoC) while also being compliant with the MIPI D-PHY v1.2 and CSI-2 v1.3 standards. In addition to video data, a V3Link™ also aggregates clock, control, and GPIO data into a single-wire bidirectional link between industry-standard interfaces.
Link Architecture and Implementation
The image below shows the typical V3Link™ system architecture. The sensor side interfaces with the TSER953 serializer and transmits data over a coaxial cable to the processor side. The TDES954 or TDES960 on the processor side is responsible for receiving and passing data to the system processor. The two components can interact with each other bi-directionally over a single coaxial cable, where the serializer and deserializer components share clock, control, and GPIO signals.
V3Link™ system architecture
At the serializer end, high-speed GPIO and I2C channels can be pulled from the incoming data stream and sent to the sensor module’s host controller. Tasks like remote control or configuration could be implemented in this way using this type of single-wire SerDes link. I2C is also implemented at the deserializer end for control and configuration, making it easy to implement a V3Link™ into a standard digital architecture.
Application Example
The image below shows a typical application diagram taken from the TDES954 datasheet. In this example, the TDES954 component interfaces with a host processor over a standard MIPI CSI-2 interface (100 Ohms differential pairs in most cases; check your processor datasheet). The SerDes channel is implemented via a high-speed connector and coax or STP cabling for data transfer into the deserializer.
Careful routing on the board with CSI-2’s 3-lane/5-level differential pair routing scheme will help ensure signal integrity on the way to the connector and eventually the deserializer. At the deserializer input, an integrated adaptive equalization block provides signal recovery over long channels.
TDES954 application diagram showing usage with a V3Link™ TSER953 serializer. (Source: TDES954 datasheet)
A similar application schematic can be developed for the TDES960 at the receiving end of the SerDes channel, although the TDES960 is intended to act as a quad-interface hub for up to 4 TSER953-supported SerDes links. This alternative deserializer uses two MIPI CSI-2 outputs and supports data collection from up to four 2 MP sensors (1080p Resolution at 60 fps). Both the TDES960 and TDES954 must be paired with an application processor that implements the required CSI-2 interface or a CSI-2 bridge.
Specifications
The high-level specifications for a V3Link™ channel are shown in the table below. Here, the interface specifications are slightly different on each end of the channel due to the required connection to an application processor (on the TDES954/960 deserializer end) and imaging sensors (on the TSER953 serializer end).
| Data rate | – Up to 4.16 Gbps |
| Video support | – Full 1080p HD support at 2.3MP/60 fps
– 4K Video at full data rate/30 fps |
| Imaging sensor interface (TSER953) | – D-PHY v1.2 and CSI-2 v1.3 compliant system
-Interface operating over 4 data lanes (maximum) at 832 Mbps per lane |
| Application processor interface (TDES954 and TDES960) | – Integrated adaptive receiver equalization
– CSI-2 v1.3 output up to 1.6 Gbps per data lane – Configuration, camera synchronization, and diagnostics over I2C with fast-mode and flexible GPIOs |
| Safety qualification | -Compliant with IEC 61000-4-2 ESD standards |
The image below shows ECAD data for the TSER953; the other two components in the TI V3Link™ line have similar symbols and footprints. The three components in the V3Link™ platform are available as low-profile surface-mount components (VQFN packaging, only 5 mm by 5 mm footprint), making them applicable for use in smaller boards for high-resolution imaging systems. Some applications for this type of component include high-resolution hardwired smart cameras, handheld cameras for broadcasting, industrial vision systems, and high-resolution automotive vision.
CAD data for the TSER953
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